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This page contains my notes/documents/reports for the courses I’ve taken. I try to fill in as much as possible but there is still lots missing. Please only use content from this page as reference material for studying. I do not condomn cheating!
Please feel free to contact me if there are any mistakes. Alternatively, since this website is also open-source on GitHub, I’m always open to issues and pull requests.
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Electrical
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ELEC 201Circuit Analysis I
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ELEC 202Circuit Analysis II
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ELEC 211Engineering Electromagnetics
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ELEC 291Electrical Design Studio I
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ELEC 301Electronic Circuits
- Chapter 1-7
- Chapter 8 (BJT Amplifiers)
- Chapter 9 (Amplifier Biasing)
- Chapter 10 (Common-Emitter Amplifier)
- Chapter 11 (Common-Base Amplifier)
- Chapter X (Cascode Amplifier)
- Chapter 12 (Common-Collector Amplifier)
- Chapter 13 (Differential Amplifier)
- Chapter 14 (Diff. Amp. Frequency Response)
- Chapter 15 (OPAMP)
- Chapter 16 (OPAMP Non-Idealities)
- Chapter 17 (Feedback)
- Chapter 18 (I/O Impedance Control)
- Chapter 19 (Two-Port Networks)
- Chapter 20 (Stability)
- Problem Set 1 2 3 4 5 6 7
- MP1 Report
- MP2 Report
- MP3 Report
- MP4 Report
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ELEC 311Electromagnetic Fields and Waves
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ELEC 315Materials and Devices
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ELEC 321Stochastic Signals and Systems
- Probability
- Conditional Probability
- Random Variable
- Normal Distribution
- Discrete Random Vector
- Continuous Random Vector
- Multivariate Normal
- Three Important Distributions
- Generating Random Variables
- Random Processes
- Information Theory
- Markov Processes
- Part 2.7 (Least Square Estimate)
- Part 2.8 (MMSE)
- Tutorial 1 2 3 9 12
- Review Session
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ELEC 341Systems and Control
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ELEC 342Electro-Mechanical Energy Conversion
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ELEC 391Electrical Project Studio II
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ELEC 400MIntro to Machine Learning for EE
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ELEC 402VLSI
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ELEC 441Control Systems II
Computer
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APSC 160Computation in Engineering Design
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CPEN 211Microcomputers
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CPEN 311Digital Systems Design
- Combinational Logic
- Sequential Logic
- Finite State Machine
- Hierarchy
- Synthesizable Verilog
- Datapath I
- Datapath II
- Datapath III
- Loops, Generate, and Tristates
- On-Chip Debug
- Fractional Numbers
- FPGA Architecture
- Debugging Techniques
- On-Board Memory
- System-on-Chip
- Circuit Timing
- Circuit Timing II
- Metastability
- Power
- High Level Synthesis
- Asynchronous Logic
- Asynchronous Datapath
- Problem Set 1 2 3 4 5
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CPEN 411Computer Architecture
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CPEN 412Microcomputer System Design
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CPSC 259Data Structures & Algorithms
Mathematics
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MATH 220Mathematical Proofs
Others
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APSC 100Intro to Engineering I
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APSC 101Intro to Engineering II
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ASTR 200Frontiers of Astrophysics
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CIVL 200, CIVL 250Engineering and Sustainable Development
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COURSERA MLIntro to Machine Learning
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MECH 431Engineering Economics
- General Economic Concepts
- Cost Models & Estimation
- Payback Period and Benefit Benefit Analysis
- Time Value of Money & Interests
- Cashflow Series
- Sources of Capital
- Present Worth Analysis
- Equivalent Annual Cashflow Analysis
- Rate of Return Analysis
- Incremental Analysis
- Future Value Analysis & Benefit Cost Ratio
- Sensitivity Analysis
- Risk Analysis I (Probability)
- Risk Analysis II (Simulation)
- Depreciation
- Taxes
- Inflation
- Replacement Analysis
- Practice 2 3 4 7
- Assignment 1 2 3
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SWED 100, SWED 110